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PipeFusion: Patch-level Pipeline Parallelism for Diffusion Transformers Inference

PipeFusion addresses high-resolution image generation latency in diffusion transformers by using patch-level pipeline parallelism with feature map reuse to reduce communication costs and improve memory efficiency.

Year
2024
Venue
arXiv 2024
Authors
5
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Abstract onlyARXIV-DEFAULT

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arxiv.org/abs/2405.14430ARXIV-DEFAULT
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Abstract

This paper presents PipeFusion, an innovative parallel methodology to tackle the high latency issues associated with generating high-resolution images using diffusion transformers (DiTs) models. PipeFusion partitions images into patches and the model layers across multiple GPUs. It employs a patch-level pipeline parallel strategy to orchestrate communication and computation efficiently. By capitalizing on the high similarity between inputs from successive diffusion steps, PipeFusion reuses one-step stale feature maps to provide context for the current pipeline step. This approach notably reduces communication costs compared to existing DiTs inference parallelism, including tensor parallel, sequence parallel and DistriFusion. PipeFusion enhances memory efficiency through parameter distribution across devices, ideal for large DiTs like Flux.1. Experimental results demonstrate that PipeFusion achieves state-of-the-art performance on 8timesL40 PCIe GPUs for Pixart, Stable-Diffusion 3, and Flux.1 models. Our source code is available at https://github.com/xdit-project/xDiT.

Authors

5