Brucek Khailany
- Papers
- 3
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3papers
Authored papers
3Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification
arXiv 2025
Pretraining Large Language Models with NVFP4
arXiv 2025
Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generation
arXiv 2024
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